XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 207

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Transmit ATM Control – Byte 0 (Address = 0xNF03)
Note:
2.2.6.14
The Transmit ATM Cell Processor block consists of a Test Cell Generator block. Similarly, the Receive ATM
Cell Processor block has a corresponding Test Cell Receiver.
2.2.6.15
The Transmit ATM Cell Processor block is capable of generating the following interrupts.
• The “Transmit Cell Extraction” Interrupt
• The “Transmit Cell Insertion” Interrupt
• The “Transmit Cell Extraction Memory Overflow” Interrupt
• The “Transmit Cell Insertion Memory Overflow” Interrupt
• The “Detection of HEC Byte Error” Interrupt
• The “Detection of Parity Error” Interrupt
This section describes the following aspects of these interrupts.
• The conditions causing these interrupts to be declared
• Instructions on how to enable or disable interrupts
• Instructions on how to services these interrupts
The Transmit Cell Extraction Interrupt
The Transmit ATM Cell Processor block will generate the “Transmit Cell Extraction” interrupt anytime the “Cell
Extraction” buffer receives a new “copied” ATM cell from the User Cell Filter. The purpose of this interrupt is
to notify the Microprocessor that the “Cell Extraction” buffer contains an ATM cell that needs to be read out
via the Microprocessor Interface.
HEC Byte
Invert
B
R/W
IT
X
7
This particular setting does not enable nor disable the Cell De-Scrambler within the Receive ATM Cell Processor
block. The user will need to separately enable or disable the Cell De-Scrambler per the instructions presented
in Section _.
T
TRANSMIT ATM CELL PROCESSOR BLOCK INTERRUPTS
HE
HEC Byte
Enable
T
Check
B
R/W
EST
IT
X
6
C
ELL
G
Parity Check
ENERATOR
Enable
B
R/W
IT
0
5
B
LOCK
Discard Cell
upon Parity
Error
B
R/W
IT
X
4
207
Odd Parity
B
R/W
IT
X
3
B
R/O
IT
0
2
Unused
B
R/O
IT
0
1
XRT94L33
Cell Payload
Scramble
Enable
Rev.1.2.0.
B
R/W
IT
1
0