XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 82
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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XRT94L33
Rev.1.2.0.
G24
B18
STS1RXD_DP_0
STS1RXD_DP_1
TXDS3POS_0
TXDS3POS_1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
O
O
CMOS
CMOS
STS-1 Receive (Drop) Telecom Bus – Parity Output pin –
Channel 0:
The exact function of this output pin depends upon whether
the STS-1 Telecom Bus Interface for Channel 0 has been
enabled or not.
If STS-1 Telecom Bus (Channel 0) has been enabled –
STS-1 Receive Telecom Bus – Parity Output pin:
This output pin can be configured to function as one of the
following.
The EVEN or ODD parity value of the bits which are output via
the “STS1RXD_D_0[7:0]” output pins.
The EVEN or ODD parity value of the bits which are being
output via the “STS1RXD_D_0[7:0]” output pins and the states
of the “STS1RXD_PL_0” and “STS1RXD_C1J1_0” output
pins.
This output pin will ultimately be used (by “drop-side” circuitry)
to verify the verify of the data which is output via the “STS-1
Telecom Bus Interface associated with Channel 0.
Note:
TXDS3POS_0 (Transmit DS3/E3/STS-1 line data positive to
LIU– Channel 0)
STS-1 Receive (Drop) Telecom Bus – Parity Output pin –
Channel 1:
The exact function of this output pin depends upon whether
the STS-1 Telecom Bus Interface for Channel 1 has been
enabled or not.
If STS-1 Telecom Bus (Channel 1) has been enabled –
STS-1 Receive Telecom Bus – Parity Output pin:
This output pin can be configured to function as one of the
following.
The EVEN or ODD parity value of the bits output via the
“STS1RXD_D_1[7:0]” output pins.
The EVEN or ODD parity value of the bits being output via the
“STS1RXD_D_1[7:0]” output pins and the states of the
“STS1RXD_PL_1” and “STS1RXD_C1J1_1” output pins.
This output pin will ultimately be used (by “drop-side” circuitry)
to verify of the data which is output via the “STS-1 Telecom
Bus Interface associated with Channel 1.
Note:
TXDS3POS_1 (Transmit DS3/E3/STS-1 line data positive to
LIU– Channel 1)
82
selections by writing the appropriate value into the
“Telecom Bus Control” Register (Address Location
= 0x013B).
selections by writing the appropriate value into the
“Telecom Bus Control” Register (Address Location
= 0x013A).
The user can make any one of these configuration
The user can make any one of these configuration
xr
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