XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 445

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
CONFIGURATION OPTIONS WITH THE RECEIVE UTOPIA INTERFACE BLOCK
Selecting the UTOPIA Level
The XRT94L33 permits the user to configure the Receive UTOPIA Interface block in either of the following
“UTOPIA Levels”.
• UTOPIA Level 3
• UTOPIA Level 1 or 2
The user can configure the Receive UTOPIA Interface block (within the XRT94L33) to operate in the
appropriate UTOPIA Level, by writing the appropriate value into Bit 7 (UTOPIA Level) within the “Receive
UTOPIA Control Register”, as depicted below.
Receive UTOPIA/POS-PHY Control Register – Byte 0 (Address = 0x0503)
Setting this bit-field to “0” configures the Receive UTOPIA Interface block to support “UTOPIA Level 3”
signaling. Conversely, setting this bit-field to “1” configures the Receive UTOPIA Interface block to support
the “UTOPIA Levels 1 and 2” form of signaling. A description of the operation of the Receive UTOPIA
Interface block, for UTOPIA Level 1, 2 and 3 operation is presented below.
2.3.5.1.2
This section presents an in-depth write up of the UTOPIA Level 1 and 2 protocols.
When the Receive UTOPIA Interface block has been configured to operate in the “UTOPIA Level 2” Mode,
then it will either be configured to operate in the “Single-PHY” or “Multi-PHY” mode, as described below.
2.3.5.1.2.1
The user can configure the width of the Receive UTOPIA Data Bus to be either 8 or 16 bits by writing the
appropriate data into Bits 3 and 2 (Receive UTOPIA Data Bus Width[1:0]) within the “Receive UTOPIA
Control” Register, as depicted below.
Receive UTOPIA/POS-PHY Control Register – Byte 0 (Address = 0x0503)
If the user chooses a UTOPIA Data Bus width of 8 bits, then only the Receive UTOPIA Data outputs:
RxUData[15:8] will be active. (The output pins: RxUData[7:0] will not be active). If the user chooses a
UTOPIA Data Bus width of 16 bits, then all of the Receive UTOPIA Data outputs: RxUData[15:0] will be
UTOPIA
UTOPIA
Disable
Disable
Level 3
Level 3
B
B
R/W
R/W
IT
IT
X
1
7
7
UTOPIA Level 1 and 2 Operation of the Receive UTOPIA Interface Block
Multi-PHY
Multi-PHY
Selecting the UTOPIA Data Bus Width
Enable
Enable
Polling
Polling
B
B
R/W
R/W
IT
IT
1
1
6
6
Back Polling
Back Polling
Back to
Back to
Enable
Enable
B
B
R/W
R/W
IT
IT
0
0
5
5
Indication
Indication
Enable
Enable
Status
Status
Direct
Direct
B
B
R/W
R/W
IT
IT
0
0
4
4
445
Receive UTOPIA/POS-PHY
Receive UTOPIA/POS-PHY
B
B
R/W
R/W
IT
IT
X
1
Data Bus Width
Data Bus Width
3
3
B
B
R/W
R/W
IT
IT
1
X
2
2
B
B
R/W
R/W
IT
IT
1
1
1
Cell Size[1:0]
1
Cell Size[1:0]
XRT94L33
Rev.1.2.0.
B
B
R/W
R/W
IT
IT
1
1
0
0