XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 435

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.3.4.8
The Receive Cell Processor will generate interrupts upon
• HEC Errors
• OAM Cell received
• Loss of Cell Delineation
If one of these conditions occur, and if that particular condition is enabled for interrupt generation, then when
the local µC/µP reads the UNI Interrupt Status Register, as shown below, it should read ‘1xxxxxxxb’ (where
the -b suffix denotes a binary expression, and
‘x’ denotes a “don’t care” value).
Operation Block Interrupt Status Register – Byte 0 (Address = 0x0113)
At this point, the local µC/µP will have determined that the Receive Cell Processor block is the source of the
interrupt, and that the Interrupt Service Routine should branch accordingly. In order to accomplish this the
local µC/µP should now read the “Rx CP Interrupt Status Register” (Address = 0x0113). The bit format of this
register is presented below.
Processor
ATM Cell
Interrupt
Receive
Status
Block
B
R/O
IT
1
7
7.3.2.8 R
STS-3 TOH
Receive
Interrupt
Status
Block
B
R/O
IT
0
6
ECEIVE
RxGFCMSB
RxCellTxed
RxGFCClk
RxGFC
SONET/VC-3
ATM C
POH Block
Interrupt
Receive
Status
B
R/O
IT
0
5
ELL
P
ROCESSOR
Processor
Interrupt
Receive
Status
Block
B
PPP
R/O
IT
0
4
From Receive STS-3c/STS-12c
I
From Receive UTOPIA
435
NTERRUPTS
POH Processor Block
Receive ATM
Interface Block
Processor
Processor
ATM Cell
Transmit
Block
Interrupt
Cell
Status
Block
B
R/O
IT
0
3
B
R/O
IT
0
2
Unused
B
R/O
IT
0
1
XRT94L33
Processor
Transmit
Interrupt
Status
Rev.1.2.0.
Block
B
PPP
R/O
IT
0
0