XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 94
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XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
- Current page: 94 of 465
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XRT94L33
Rev.1.2.0.
AG11
AF12
RXHDLCDAT_5_2
RXHDLCDAT_6_2
STS1RXD_D5_2
STS1RXD_D6_2
RXDS3DATA_2
RXDS3FP_2
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
O
O
CMOS
CMOS
Receive STS-1 Telecom Bus – Channel 2 – Output Data
Bus pin number 5:
The exact function of this output pin depends upon whether
the STS-1 Telecom Bus Interface, associated with Channel 2
is enabled or not.
If STS-1 Telecom Bus (Channel 2) has been enabled –
STS-1 Receive Telecom Bus – Output Data bus pin number 5:
STS1RXD_D5_2
This output
“STS1RXD_D_2[4:0]” function as the “STS-1 Receive (Drop)
Telecom Bus – Output Data Bus for Channel 2. The STS-1
Telecom Bus Interface will update the data via this output
upon the rising edge of “STS1RXD_CK_2.
RXHDLCDAT_5_2 (Receive HDLC block data output –
Channel 2 – Output Data Bus pin5):
This output pin along with RxHDLCDat_
RXDS3FP_2 (Receive DS3 frame pulse – Channel 2)
Receive STS-1 Telecom Bus – Channel 2 – Output Data
Bus pin number 6:
The exact function of this output pin depends upon whether
the STS-1 Telecom Bus Interface, associated with Channel 2
is enabled or not.
If STS-1 Telecom Bus (Channel 2) has been enabled –
STS-1 Receive Telecom Bus – Output Data bus pin number 6:
STS1RXD_D6_2
This
“STS1RXD_D_2[5:0]” function as the “STS-1 Receive (Drop)
Telecom Bus – Output Data Bus for Channel 2. The STS-1
Telecom Bus Interface will update the data via this output
upon the rising edge of “STS1RXD_CK_2.
RXHDLCDAT_6_2 (Receive HDLC block data output –
Channel 2 – Output Data Bus pin 6)
RXDS3DATA_2 (Receive DS3 data – Channel 2)
94
output
pin
pin
along
along
with “STS1RXD_D_2[7:6]”
with
“STS1RXD_D7_2”
xr
and
and
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