XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 346

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L33
Rev.1.2.0.
Receive STS-3 Transport Status Register – Byte 0 (Address = 0x1107)
Setting Bit 2 (Change of LOF Defect Condition Interrupt Status) within the Receive STS-3 Transport Interrupt
Status Register – Byte 0 to “1” as depicted below.
Receive STS-3 Transport Interrupt Status Register – Byte 0 (Address = 0x110B)
2.3.1.3.6.3
The user can configure the Transmit STS-3 TOH Processor block to automatically transmit the RDI-L
indicator to the remote LTE whenever (and for the duration that) the corresponding Receive STS-3 TOH
Processor block declares the LOF defect condition.
Figure 82 presents an illustration of the Transmit STS-3 TOH Processor block transmitting the RDI-L
indicator, to the remote LTE, whenever the corresponding Receive STS-3 TOH Processor block declares the
LOF defect condition.
Figure 82 Illustration of the Transmit STS-3 TOH Processor block (within a given XRT94L33)
transmitting the RDI-L indicator, to the remote LTE whenever the corresponding Receive STS-3 TOH
Processor block declares the LOF defect condition.
The user can implement this configuration by setting Bit 1 (Transmit RDI-L upon LOF) within the Transmit
STS-3 Transport – RDI-L Control Register, as depicted below.
Declared
Change of
SF Defect
Condition
Interrupt
Defect
RDI-L
B
Status
R/O
B
RUR
14. It will generate the “Change of LOF Defect Condition” Interrupt. The Receive STS-3 TOH Processor
IT
0
IT
0
7
7
block will indicate that it is declaring the “Change of LOF Defect Condition” interrupt by doing the
following.
c. Toggling the “INT*” output pin “low”.
Declared
Unstable
S1 Byte
Defect
Change of
SD Defect
B
Condition
R/O
Interrupt
Configuring the Transmit STS-3 TOH Processor block to automatically transmit the
RDI-L Indicator whenever the Receive STS-3 TOH Processor Block declares the LOF
Defect Condition
IT
0
Status
B
RUR
6
IT
0
6
Unstable
Declared
K1, K2
Defect
B
Byte
R/O
Detection of
REI-L Error
IT
0
Interrupt
Status
5
B
RUR
IT
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
Declared
Defect
B
R/O
SF
IT
0
Detection of
4
Interrupt
B2 Byte
Status
B
Error
RUR
IT
0
4
Declared
Defect
B
346
R/O
SD
IT
0
3
Detection of
Interrupt
B1 Byte
Status
B
Error
RUR
IT
0
3
Declared
Defect
B
LOF
R/O
IT
0
2
LOF Defect
Change of
Condition
Interrupt
Status
B
RUR
IT
1
Declared
Defect
2
B
SEF
R/O
IT
0
1
SEF Defect
Change of
Condition
Interrupt
Status
B
RUR
Declared
IT
0
Defect
B
LOS
R/O
1
xr
IT
0
0
LOS Defect
Change of
Condition
Interrupt
Status
B
RUR
IT
0
0

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