XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 386

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
2.3.2
The purpose of the Receive STS-3c POH Processor block is to accomplish the following.
• To receive an STS-3c SPE from the Receive STS-3 TOH Processor block
• To acquire and maintain the location of the STS-3c SPE, within the incoming STS-3c data-stream
• To compute and verify the B3 bytes and increment performance monitor registers anytime it detects B3
byte errors.
• To declare and clear the following defect conditions.
• To increment performance monitor registers anytime it detects an REI-P event.
• To receive either 1-byte, 16-byte or 64-byte Path Trace Identification Messages via the J1 byte within each
incoming STS-3c SPE; and to detect and declare the TIM-P defect condition when appropriate.
Figure 90 presents an illustration of the Functional Block Diagram of the XRT94L33 Mapper IC; with the
“Receive STS-3c POH Processor” block highlighted.
RECEIVE STS-3
-
-
-
-
-
-
LOP-P (Loss of Pointer)
AIS-P (Path AIS)
RDI-P (Path – Remote Defect Indicator)
PLM-P (Path – Payload Label Mismatch)
UNEQ-P (Path – Unequipped)
TIM-P (Path – Trace Identification Mismatch)
C
POH PROCESSOR BLOCK (
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
386
FOR
STS-3
C
A
PPLICATIONS
)
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