XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 98

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
AC9
AC8
RxE1F1E2
RxSDCC
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
O
O
CMOS
CMOS
Receive – Order-Wire Output Port – Output Pin:
This output pin, along with “RxE1F1E2Val”, “RxE1F1F2FP, and the
“RxTOHClk” output pins function as the “Receive Order-Wire
Output Port of the XRT94L33.
This pin outputs the contents of the “Order-Wire” bytes (e.g., the
E1, F1 and E2 bytes) within the incoming STS-3 data-stream.
The Receive Order-Wire Output port will pulse the “RxE1F1E2FP”
output pin “high” (for one period of “RxTOHClk”) coincident to when
the very first bit (of the E1 byte) is being output via the “RxE1F1E2”
output pin. Additionally, the Receive Order-Wire Output port will
also assert the “RxE1F1E2Val” output pin, in order to indicate that
the data, residing on the “RxE1F1E2” output pin is valid “Order-
Wire” byte.
The
“RxE1F1E2Val”, the “RxE1F1E2FP” and the “RxE1F1E2” output
pins upon the falling edge of the “RxTOHClk” output pin.
The “Receive Order-Wire” circuitry that is interfaced to this output
pin, and the “RxE1F1E2Val”, the “RxE1F1E2” and the “RxTOHClk”
pins is suppose to do the following.
It should continuously sample and monitor the state of the
“RxE1F1E2Val” and “RxE1F1E2FP” output pins upon the rising
edge of “RxTOHClk”.
Anytime the “Order-wire” circuitry samples the “RxE1F1E2Val” and
“RxE1F1E2FP output pins “HIGH, it should begin to sample and
latch the contents of this output pin (as a valid “Order-Wire” bit) into
the “Order-Wire” circuitry.
The “Order-Wire” circuitry should continue to sample and latch the
contents of the output pin until the “RxE1F2E2Val” output pin is
sampled “low”.
Receive – Section DCC Output Port – Output Pin:
This output pin, along with “RxSDCCVAL” and the “RxTOHClk”
output pins function as the “Receive Section DCC” output port of
the XRT94L33.
This pin outputs the contents of the Section DCC (e.g., the D1, D2
and D3 bytes), within the incoming STS-3 data-stream.
The
“RxSDCCVAL” output pin, in order to indicate that the data,
residing on the “RxSDCC” output pin is a valid Section DCC byte.
The
“RxSDCCVAL” and the “RxSDCC” output pins upon the falling
edge of the “RxTOHClk” output pin.
The Section DCC HDLC circuitry that is interfaced to this output
pin, the “RxSDCCVAL” and the “RxTOHClk” pins is suppose to do
the following.
It should continuously sample and monitor the state of the
“RxSDCCVAL” output pin upon the rising edge of “RxTOHClk”.
Anytime the
“RxSDCCVAL” output pin “HIGH”, it should sample and latch the
contents of this output pin (as a valid Section DCC bit) into the
“Section DCC HDLC” circuitry.
Receive
Receive
98
Receive
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Section
Section
Order-Wire
DCC HDLC”
DCC
DCC
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