XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 26

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
C5
D8
TxSDCC
TxLDCC
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
I
I
TTL
TTL
Transmit - Section DCC Input Port – Input pin:
This input pin, along with the “TxSDCCEnable” and the
“TxTOHClk” output pins permit the user to insert their value for
the D1, D2 and D3 bytes, into the Transmit STS-3 TOH
Processor Block. The Transmit STS-3 TOH Processor block
will accept this data and insert it into the D1, D2 and D3 byte
fields, within the “outbound” STS-3 data-stream.
The Section DCC HDLC Circuitry that is interfaced to this input
pin, the “TxSDCCEnable” and the “TxTOHClk” pins is suppose
to do the following.
It
“TxSDCCEnable” input pin.
Whenever the “TxSDCCEnable” input pin pulses “HIGH”, then
the Section DCC HDLC Controller circuitry should place the
next Section DCC bit (to be inserted into the “Transmit STS-3
TOH Processor” block) onto this input pin upon the rising edge
of “TxTOHClk”.
Any data that is placed on the “TxSDCC” input pin, will be
sampled upon the falling edge of “TxTOHClk”.
Note:
Transmit - Line DCC Input Port:
This input pin, along with the “TxLDCCEnable” and the
“TxTOHClk” pins permit the user to insert their value for the
D4, D5, D6, D7, D8, D9, D10, D11 and D12 bytes, into the
Transmit STS-3 TOH Processor Block. The Transmit STS-3
TOH Processor block will accept this data and insert it into the
D4, D5, D6, D7, D8, D9, D10, D11 and D12 byte-fields, within
the “outbound” STS-3 data-stream.
Whatever Line DCC HDLC Controller Circuitry is interface to
the this input pin, the “TxLDCCEnable” and the “TxTOHClk” is
suppose to do the following.
It
“TxLDCCEnable” input pin.
Whenever the “TxLDCCEnable” input pin pulses “HIGH”, then
the Section DCC Interface circuitry should place the next Line
DCC bit (to be inserted into the “Transmit STS-3 TOH
Processor” block) onto the “TxLDCC” input pin, upon the rising
edge of “TxTOHClk”.
Any data that is placed on the “TxLDCC” input pin, will be
sampled upon the falling edge of “TxTOHClk”.
Note:
26
should
should
used.
used.
This pin should be connected to GND if it is not
This pin should be connected to GND if it is not
continuously
continuously
monitor
monitor
the
the
xr
state
state
of
of
the
the