XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 293

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
STEP 2 – Induce a “0 to 1 transition” in Bit 5 (Pointer Force) within the “Transmit SONET Path –
Transmit Path Control Register, as depicted below.
Transmit SONET Path – Transmit Path Control Register (Address = 0xN9B7)
Once the user induces this “0 to 1 transition” in Bit 5, then the following events will occur, within the very next
“outbound” STS-1 frame.
• The NDF bits, within the H1 byte, will be set to the value written into Bits 4 through 7 (NDF Bits) within the
“Transmit SONET Path – Transmit Arbitrary H1 Byte Pointer Register.
• The “SS” bits, within the H1 byte, will be set to the value written into Bits 2 and 3 (SS Bits) within the
“Transmit SONET Path – Transmit Arbitrary H1 Byte Pointer Register.
• The 10-bit pointer value (within bits 7 and 8, within the H1 byte, and all eight bits within the H2) will be set to
the values written into Bits 1 and 0 (H1 Pointer) within the “Transmit SONET Path – Transmit Arbitrary H1
Byte Pointer” register, and Bits 7 through 0 (H2 Pointer Value) within the “Transmit SONET Path – Transmit
Arbitrary H2 Byte Pointer” Register.
2.2.8.3.11.2
The Transmit SONET POH Processor block permits the user to insert a “positive-stuff” pointer adjustment
event into the outbound STS-1 data-stream. This can be accomplished by inducing a “0 to 1” transition in Bit
2 (Insert Positive Stuff) within the “Transmit SONET Path – Transmit Path Control” Register, as depicted
below.
Transmit SONET Path – Transmit Path Control Register (Address = 0xN9B7)
Once the user induces this “0 to 1 transition” in Bit 2, then the following events will occur.
• A “positive-stuff” will occur (e.g., a single stuff byte will be inserted into the STS-1 data-stream, immediately
after the H3 byte position).
• The “I” bits, within the H1 and H2 bytes will be inverted (to denote an “Incrementing” Pointer Adjustment)
event.
• After the “positive-stuff” event, the pointer (consisting of the H1 and H2 bytes) will be incremented by “1”
and will be used as the new pointer from this point on.
Note:
B
B
R/O
R/O
IT
IT
0
0
7
7
The contents of Bit 2 (Insert Positive Stuff) will be automatically cleared after the user has written a “1” into this
bit-field. Hence, there is no need for the user to go back and write a “0” into this bit-field.
Unused
Unused
Forcing Positive-Stuff Pointer Adjustment Events via Software
B
B
R/O
R/O
IT
IT
0
0
6
6
Pointer
Pointer
Force
Force
0 ->1
B
B
R/W
R/W
IT
IT
0
5
5
Check Stuff
Check Stuff
B
B
R/W
R/W
IT
IT
0
0
4
4
293
Negative
Negative
Insert
Insert
B
B
Stuff
Stuff
W
W
IT
IT
0
0
3
3
Positive
Positive
0 -> 1
Insert
Insert
B
B
Stuff
Stuff
W
W
IT
IT
0
2
2
NDF Events
NDF Events
Continuous
Continuous
Insert
Insert
B
B
R/W
R/W
IT
IT
0
0
1
1
XRT94L33
Insert Single
Insert Single
NDF Event
NDF Event
Rev.1.2.0.
B
B
R/W
R/W
IT
IT
0
0
0
0