XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 441

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Figure 110
The UNI can operate in either the “Octet-Level” or “Cell-Level” Handshake mode, when operating in the
Single-PHY mode. However, only the Cell-Level Handshake Mode is available when the UNI is operating in
the Multi-PHY mode. For more information on Single PHY and Multi PHY operation, please see Section _.
The user can configure the UNI to operate in one of these two handshake modes by writing the appropriate
data to Bit 5 (Handshake Mode) of the UTOPIA Configuration Register, as depicted below.
This interface supports both an 8 and 16 bit wide data bus. Since data is received at clock rates independent
of the ATM layer clock rate, the received cell data is written into an internal FIFO by the Receive Cell
Processor block. This FIFO will be referred to as the Rx FIFO throughout this document. The Receive Cell
Processor will delineate, check for HEC byte errors, filter and de-scramble ATM Cells. Whatever cells were
not discarded, by the Receive Cell Processor, will be written into the Rx FIFO, where it can be read out from
the UNI device, by the ATM Layer Processor. The Receive UTOPIA Interface Block will inform the ATM
Layer processor that it has cell data available for reading, by asserting the RxUClav pin “high”. Figure 111
presents a simple illustration of the Receive UTOPIA Interface block and the associated pins.
Figure 111 Simple Block Diagram of Receive UTOPIA Block of UNI
DETAILED FUNCTIONAL DESCRIPTION OF RECEIVE UTOPIA
The purposes of the Receive UTOPIA Interface block are to:
• Receive filtered ATM cell data from the Receive Cell Processor and make this data available to the AAL or
ATM Layer Processor.
• Inform the ATM Layer Processor whenever the RxFIFO contains cell data that needs to be read.
• Inform the ATM Layer Processor that it has no more cell data to be read.
From Receive ATM Cell Processor
Receive UTOPIA
Interface
441
RxUClk
RxUEnB
RxUPrty
RxUData[15:0]
RxUSoC
RxUClav/RxEmptyB*
RxUAddr[4:0]
XRT94L33
Rev.1.2.0.

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