XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 297

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Figure 58: Simple Illustration of the STS-3 Frame
In the case of an STS-N frame, the first “N x 3” column are referred to as the “Transport Overhead” (TOH).
Therefore, in all, the TOH consists of a total of 27 x N bytes. Each of these POH bytes is briefly described
below.
A1, A2 – Framing Alignment Bytes
J0 – The Section Trace (Growth) Byte
B1 – The Section BIP-8 Byte
E1 – The Orderwire
The operation of the “Transmit STS-3 TOH Processor” block is discussed in some detail below.
2.2.9.1
The Transmit STS-3 TOH Processor block receives the STS-3c SPE data (with newly derived POH bytes)
from the Transmit STS-3c POH Processor block.
As the Transmit STS-3 TOH Processor block receives the STS-3c SPE data from the Transmit STS-3c POH
Processor block, it will perform the following functions.
• Compute and insert the B1 byte
• Compute and insert the B2 byte
• To source (per user configuration) the K1, K2, E1, M0, J0, F1 and S1 bytes.
• To (automatically or upon software command) transmit the RDI-L indicator
• To (automatically or upon software command) transmit the REI-L indicator
• To (upon software command) transmit the AIS-L indicator
• To (optionally) scramble the data, prior to transmission to the Transmit PECL Interface or the Transmit
STS-3 Telecom Bus Interface blocks.
Each of these functions is described in considerable detail below.
2.2.9.2
The Transmit STS-3 TOH Processor block computes a BIP-8 value over an entire STS-3 frame. The
results of this calculation are inserted into the B1 byte-position within the very next STS-3 frame.
The Remote LTE (Line Terminating Equipment) will use this byte, in order to perform error-
checking/detection on the incoming STS-3 frames that it receives.
TRANSMISSION OF ERRED B1 BYTES IN THE OUTBOUND STS-3 DATA-STREAM
The Transmit STS-3 TOH Processor block permits the user to insert errors into the B1 bytes, within the
outbound STS-3 data-stream.
The user can accomplish this by writing a “non-zero” value into the “Transmit STS-3 Transport – Transmit B1
Byte Error Mask” register. The Transmit STS-3 TOH Processor block will perform an XOR operation with the
contents of “outbound” B1 byte value and the contents of this register. The results of this calculation are
loaded back into the B1 byte position, within the “outbound” STS-3 data-stream.
RECEIVING STS-3
COMPUTATION AND INSERTION OF THE SECTION BIP-8 (B1) BYTE
C
SPE DATA FROM THE TRANSMIT STS-3
297
C
POH PROCESSOR BLOCK
XRT94L33
Rev.1.2.0.