XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 288

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
2.2.8.3.9.2
The Transmit SONET POH Processor block permits the user to specify the contents of the Z4 byte, within the
“outbound” STS-1 SPE, via data applied to the “TxPOH_n” input pin.
The user can configure the Transmit SONET POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “1” into Bit 0 (Z4 Byte Insertion Type) within the “Transmit SONET Path –
SONET Control Register – Byte 1”, as depicted below.
Transmit SONET Path – SONET Control Register – Byte 1 (Address = 0xN982)
This step configures the Transmit SONET POH Processor block to use the “TxPOH_n” input port as the
source for the Z4 byte, within each “outbound” STS-1 SPE.
Processor block will accept the value, corresponding to the Z4 byte (via the “TxPOH_n” input port) and it will
write this data into the Z4 byte position, within the “outbound” STS-1 SPE.
STEP 2 – Begin providing the values of the “outbound” Z4 byte to the “TxPOH_n” input port.
The procedure for applying the Z4 byte to the “TxPOH_n” input port is presented below.
Using the “TxPOH” Input Port to insert the Z4 byte value into the outbound STS-1 SPE data-stream
If the user intends to externally insert the Z4 byte into the outbound STS-1 SPE, via the “TxPOH_n” input port,
then they must design some external circuitry (which can be realized in an ASIC, FPGA or CPLD solution) to
do to the following.
• Continuously sample the “TxPOHEnable_n” and the “TxPOHFrame_n” output pins upon the rising edge of
the “TxPOHClk_n” output clock signal.
A simple illustration of this “external circuit” being interfaced to the “TxPOH Input Port” is presented below in
Figure 55.
B
R/O
IT
0
7
Setting and Controlling the Outbound Z4 Byte via the “TxPOH_n Input Port”
B
R/O
IT
0
6
Unused
B
R/O
IT
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
B
R/O
IT
0
4
288
Z5 Insertion
B
Type
R/W
IT
0
3
In this mode, the Transmit SONET POH
Z4 Insertion
B
Type
R/W
IT
1
2
Z3 Insertion
B
Type
R/W
IT
0
1
xr
H4 Insertion
Type
B
R/W
IT
0
0