XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 256

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
Figure 45: Illustration of the Functional Block Diagram of the XRT94L33 Mapper IC, with the Transmit
SONET POH Processor block high-lighted
SOME BACKGROUND INFORMATION ON THE PATH OVERHEAD (POH) BYTES
For STS-1 applications, the size of the SPE is 9 rows by 261 byte columns. Figure 46 presents a simple
illustration of the STS-1 SPE.
Figure 46: Simple Illustration of the STS-1 SPE
In each case, the first byte column within an STS-1 SPE is referred to as the Path Overhead (POH).
Therefore, in all, the POH consists of a total of nine (9) bytes. Each of these POH bytes is briefly described
below.
J1 – The Path Trace Byte
B3 – The Path BIP-8 Byte
C2 – The Payload Label Byte
G1 – The Path Status Byte
F2 – The Path User Channel Byte
H4 – The Multi-Frame Indicator (not used for ATM and PPP applications)
Z3, Z4 and Z5 – Growth Bytes
The remainder of this section describes how the Transmit SONET POH Processor block handles these POH
bytes.
The operation of the “Transmit SONET POH Processor” block is discussed in some detail below.
Microprocessor
Microprocessor
Interface
STS-3/12
Interface
STS-3/12
Telecom
Interface
Interface
STS-3/12
Interface
STS-3/12
Telecom
Interface
STS-3/12
PECL
Block
Block
Block
STS-3/12
PECL
Block
Block
Block
Block
Bus
CDR
Bus
Block
CDR
Synthesizer
Synthesizer
Processor
Transmit
Processor
Processor
Transmit
Clock
Block
STS-3
Processor
Block
Receive
TOH
Clock
Block
STS-3
STS-3
Block
Receive
Block
TOH
TOH
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
STS-3
Block
TOH
XRT94L33 – Channel 0
Processor
Processor
Transmit
SONET
Processor
SONET
Processor
Receive
Transmit
SONET
Receive
SONET
Block
Block
POH
POH
Block
Block
POH
POH
256
To Channels 1 and 2
Cell Processor
Cell Processor
Cell Processor
Cell Processor
Processor
Processor
Transmit
Processor
Processor
From Channels 1 and 2
Receive
Transmit
Transmit
Receive
Transmit
Block
Receive
Block
Receive
Block
ATM
PPP
PPP
Block
Block
Block
ATM
Block
ATM
PPP
PPP
Block
ATM
POS-PHY
POS-PHY
UTOPIA/
Transmit
UTOPIA
Interface
Transmit
Interface
Interface
Interface
POS-PHY
POS-PHY
UTOPIA/
Receive
Receive
Transmit
UTOPIA
Interface
Transmit
Interface
Interface
Interface
Receive
Receive
xr
Block
Block
Block
Block
Block
Block
Block
Block