DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 119
![KIT DEV MAX V 5M570Z](/photos/18/31/183180/dk-dev-5m570zn_sml.jpg)
DK-DEV-5M570ZN
Manufacturer Part Number
DK-DEV-5M570ZN
Description
KIT DEV MAX V 5M570Z
Manufacturer
Altera
Series
MAX® Vr
Type
CPLDr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(2 pages)
3.DK-DEV-5M570ZN.pdf
(30 pages)
4.DK-DEV-5M570ZN.pdf
(164 pages)
5.DK-DEV-5M570ZN.pdf
(24 pages)
Specifications of DK-DEV-5M570ZN
Contents
Board, Cable(s), Software and Documentation
Silicon Manufacturer
Altera
Core Architecture
CPLD
Core Sub-architecture
MAX
Silicon Core Number
5M
Silicon Family Name
MAX V
Kit Contents
MAX V CPLD Development Board, USB Cable
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
5M570ZF256
Lead Free Status / Rohs Status
Compliant
Other names
544-2722
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 7: User Flash Memory in MAX V Devices
Software Support for UFM Block
January 2011 Altera Corporation
Page Write Operation
Page write operation has a similar sequence as the byte write operation, except that
several bytes of data are transmitted in sequence before the master issues a stop
condition. The internal write from the MAX V logic array to the UFM begins only
after the master generates a stop condition. While the UFM internal write cycle is in
progress, the ALTUFM_I2C logic ignores any attempt made by the master to initiate a
new transfer. The ALTUFM_I2C megafunction allows you to choose the page size of 8
bytes, 16 bytes, or 32 bytes for the page write operation.
A write operation is only possible to an erased UFM block or word location. The UFM
block differs from serial EEPROMs, requiring an erase operation before writing new
data in the UFM block. A special erase sequence is required, as discussed in
Operation”.
Acknowledge Polling
The master can detect whether the internal write cycle is completed by polling for an
acknowledgement from the slave. The master can re-send the start condition together
with the slave address as soon as the byte write sequence is finished. The slave does
not acknowledge if the internal write cycle is still in progress. The master can repeat
the acknowledge polling and proceed with the next instruction after the slave
acknowledges.
Write Protection
The ALTUFM_I2C megafunction includes an optional Write Protection (WP) port
available on page 4 of the ALTUFM MegaWizard Plug-In Manager. In the
MegaWizard Plug-In Manager, you can choose the WP port to protect either the full or
upper half memory.
When WP is set to 1, the upper half or the entire memory array (depending on the
write protection level selected) is protected, and the write and erase operations are not
allowed. The ALTUFM_I2C megafunction acknowledges the slave address and
memory address. After the master transfers the first data byte, the ALTUFM_I2C
megafunction sends a not-acknowledge condition to the master to indicate that the
instruction will not execute. When WP is set to 0, the write and erase operations are
allowed.
Erase Operation
Commercial serial EEPROMs automatically erase each byte of memory before writing
into that particular memory location during a write operation. However, the MAX V
UFM block is flash based and only supports sector erase operations. Byte erase
operations are not supported. When using read/write mode, a sector or full memory
erase operation is required before writing new data into any location that previously
contained data. The block cannot be erased when the ALTUFM_I2C megafunction is
in read-only mode.
Data can be initialized into memory for read/write and read-only modes by including
a memory initialization file (.mif) or hexadecimal file (.hex) in the ALTUFM
MegaWizard Plug-In Manager. This data is automatically written into the UFM
during device programming by the Quartus II software or third-party programming
tool.
MAX V Device Handbook
“Erase
7–17