DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 28

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

2–16
MAX V Device Handbook
Figure 2–11. LUT Chain and Register Chain Interconnects
The C4 interconnects span four LABs up or down from a source LAB. Every LAB has
its own set of C4 interconnects to drive either up or down.
interconnect connections from an LAB in a column. The C4 interconnects can drive
and be driven by column and row IOEs. For LAB interconnection, a primary LAB or
its vertical LAB neighbor can drive a given C4 interconnect. C4 interconnects can
drive each other to extend their range as well as drive row interconnects for
column-to-column connections.
Interconnect
Adjacent LE
Routing to
LUT Chain
Local
Local Interconnect
Routing Among LEs
in the LAB
LE6
LE0
LE1
LE2
LE3
LE4
LE5
LE7
LE8
LE9
Register Chain
Routing to Adjacent
LE's Register Input
Figure 2–12
December 2010 Altera Corporation
Chapter 2: MAX V Architecture
MultiTrack Interconnect
shows the C4