DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 130
![KIT DEV MAX V 5M570Z](/photos/18/31/183180/dk-dev-5m570zn_sml.jpg)
DK-DEV-5M570ZN
Manufacturer Part Number
DK-DEV-5M570ZN
Description
KIT DEV MAX V 5M570Z
Manufacturer
Altera
Series
MAX® Vr
Type
CPLDr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(2 pages)
3.DK-DEV-5M570ZN.pdf
(30 pages)
4.DK-DEV-5M570ZN.pdf
(164 pages)
5.DK-DEV-5M570ZN.pdf
(24 pages)
Specifications of DK-DEV-5M570ZN
Contents
Board, Cable(s), Software and Documentation
Silicon Manufacturer
Altera
Core Architecture
CPLD
Core Sub-architecture
MAX
Silicon Core Number
5M
Silicon Family Name
MAX V
Kit Contents
MAX V CPLD Development Board, USB Cable
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
5M570ZF256
Lead Free Status / Rohs Status
Compliant
Other names
544-2722
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- DK-DEV-5M570ZN PDF datasheet
- DK-DEV-5M570ZN PDF datasheet #2
- DK-DEV-5M570ZN PDF datasheet #3
- DK-DEV-5M570ZN PDF datasheet #4
- DK-DEV-5M570ZN PDF datasheet #5
- Current page: 130 of 164
- Download datasheet (5Mb)
7–28
Figure 7–23. WRITE Operation Sequence for Extended Mode
Figure 7–24. WRITE Operation Sequence for Base Mode
MAX V Device Handbook
SCK
nCS
SO
SI
4. An 8-bit data is transmitted through SI.
5. nCS is pulled back to high to indicate the end of transmission.
Figure 7–24
SECTOR-ERASE
SECTOR-ERASE (SE) is the instruction of erasing one sector of the UFM block. Each
sector contains 256 words. WEN bit and the sector must not be protected for SE
operation to be successful. nCS must be driven high before the instruction is executed
internally. You may poll the nRDY bit in the software status register for the completion
of the internal self-timed SECTOR-ERASE cycle. For SPI Extended mode, the SE
operation is performed in the following sequence, as shown in
1. nCS is pulled low.
2. Opcode 00100000 is transmitted into the interface.
3. The 16-bit address is sent. The eighth bit (the first seven bits will be discarded) of
MSB
SCK
nCS
SI
SO
0
the address indicates which sector is erased; a 0 means sector 0 (UFM0) is erased,
and a 1 means sector 1 (UFM1) is erased.
1
Instruction
2
8-bit
02
3
H
4
High Impedance
MSB
shows the WRITE operation sequence for Base mode.
0
5 6 7
1
Instruction
2
8-bit
MSB
02
8
3
H
9 10 11
4
5 6 7
Address
16-bit
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
High Impedance
20 21 22 23 24 25 26 27
Address
8-bit
MSB
MSB
16-bit Data In
8-bit Data In
Chapter 7: User Flash Memory in MAX V Devices
36 37 38 39
January 2011 Altera Corporation
Software Support for UFM Block
Figure
7–25:
Related parts for DK-DEV-5M570ZN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-DEV-2AGX125N](/photos/28/41/284154/dk-dev-2agx125n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
![DK-DEV-3CLS200N](/photos/9/24/92409/dk-dev-3cls200n_tmb.jpg)
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SE530N](/photos/28/41/284157/dk-dev-4se530n_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
![DK-DEV-2AGX260N](/photos/28/41/284175/dk-dev-2agx260n_tmb.jpg)
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
![DK-DEV-5SGXEA7/ES](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer:
Altera
Datasheet:
![DK-DEV-3SL150N](/photos/9/20/92079/dk-dev-3sl150n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX230N](/photos/28/41/284156/dk-dev-4sgx230n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![DK-DEV-1AGX60N](/photos/9/31/93181/mfgdk-dev-1agx60n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
![DK-DEV-4CGX150N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX530N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: