DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 86

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

4–6
Figure 4–5. Power-Up Characteristics for MAX V Devices
Document Revision History
Table 4–1. Document Revision History
MAX V Device Handbook
Notes to
(1) Time scale is relative.
(2) For this figure,
December 2010
V
CCIO
Date
250 mV
Figure
banks are powered.
1.55 V
3.3 V
1.8 V
1.4 V
V
CCINT
4–5:
1
1
all the V
Version
For MAX V devices, the POR circuitry does not monitor the V
levels after the device enters user mode. If there is a V
during user mode, the functionality of the device is not guaranteed and you must
power down V
V
SRAM download restarts and the device begins to operate after the t
passed.
Figure 4–5
mode and from user mode to power down or brown out.
All V
user mode.
After SRAM configuration, all registers in the device are cleared and released into
user function before the I/O tri-states are released. To release clears after the tri-states
are released, use the DEV_CLRn pin option. To hold the tri-states beyond the power-up
configuration time, use the DEV_OE pin option.
Table 4–1
1.0
CCIO
Tri-State
CCIO
banks are powered up simultaneously with the V
CCINT
up again. After V
Initial release.
lists the revision history for this chapter.
and V
shows the voltages for POR of MAX V devices during power up into user
CCINT
t
CCIO
CONFIG
MAX V Device
to 250 mV for a minimum of 10 µs before powering V
power supplies of all banks must be powered on before entering
Approximate Voltage
for SRAM Download Start
User Mode
Operation
CCINT
rises from 250 mV back to approximately 1.55 V, the
(Note
minimum 10 µs
CCINT
1),
Chapter 4: Hot Socketing and Power-On Reset in MAX V Devices
profile shown. If this is not the case, t
(2)
V
CCINT
Changes
to 250 mV if the V
dips below this level
must be powered down
Tri-State
CCINT
CCINT
voltage sag below 1.4 V
December 2010 Altera Corporation
CCINT
CONFIG
Document Revision History
t
User Mode
and V
CONFIG
Operation
CONFIG
stretches out until all
CCIO
CCINT
time has
voltage
and