DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 131

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

Chapter 7: User Flash Memory in MAX V Devices
Software Support for UFM Block
January 2011 Altera Corporation
4. nCS is pulled back to high.
For SPI Base mode, the SE instruction erases UFM sector 0. Because there are no
choices of UFM sectors to be erased, there is no address component to this instruction.
The SE operation is always done through the following sequence in SPI Base mode:
1. nCS is pulled low.
2. Opcode 00100000 is transmitted into the interface.
3. nCS is pulled back to high.
Figure 7–25. SECTOR-ERASE Operation Sequence for Extended Mode
Figure 7–26
Figure 7–26. SECTOR_ERASE Operation Sequence for Base Mode
shows the SECTOR-ERASE operation sequence for Base mode.
SCK
nCS
SI
SO
SCK
nCS
SI
SO
MSB
0
1
Instruction
2
8-bit
20
3
MSB
H
0
4
1
Instruction
5 6 7
2
8-bit
20
High Impedance
3
H
MSB
4
8
5 6 7
9 10 11
High Impedance
Address
16-bit
20 21 22 23
MAX V Device Handbook
7–29