DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 156

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

8–10
Figure 8–9. SAMPLE/PRELOAD Shift Data Register Waveforms
MAX V Device Handbook
TMS
TDO
TCK
TAP_STATE
TDI
EXTEST Instruction Mode
SHIFT_IR
Instruction Code
Figure 8–9
until after the capture register data that is shifted out. If TMS is held high on two
consecutive TCK clock cycles, the TAP controller advances to the UPDATE_DR state for
the update phase.
If you enable the device output enable feature but the DEV_OE pin is not asserted
during boundary-scan testing, the output enable boundary-scan registers of the BSCs
capture data from the core of the device during SAMPLE/PRELOAD. These values are not
high impedance, although the I/O pins are tri-stated.
Figure 8–9
Use EXTEST instruction mode to check the external pin connections between devices.
Unlike SAMPLE/PRELOAD mode, EXTEST allows test data to be forced onto the pin
signals. By forcing known logic high and low levels on output pins, you can detect
opens and shorts at pins of any device in the scan chain.
EXTEST selects data differently than SAMPLE/PRELOAD. EXTEST chooses data from the
update registers as the source of the output and output enable signals. After the
EXTEST instruction code is entered, the multiplexers select the update register data;
thus, you can force the data stored in these registers from a previous EXTEST or
SAMPLE/PRELOAD test cycle onto the pin signals. In the capture phase, the results of this
test data are stored in the capture registers and then shifted out of TDO during the shift
phase. You can store the new test data in the update registers during the update
phase.
EXIT1_IR
shows that the test data that shifted into TDI does not appear at the TDO pin
shows the SAMPLE/PRELOAD waveforms.
UPDATE_IR
SELECT_DR_SCAN
CAPTURE_DR
Data stored in
boundary- scan
register is shifted
out of TDO.
Chapter 8: JTAG Boundary-Scan Testing in MAX V Devices
After boundry-scan
register data has been
shifted out, data
entered into TDI will
shift out of TDO.
IEEE Std. 1149.1 BST Operation Control
SHIFT_DR
December 2010 Altera Corporation
EXIT1_DR
UPDATE_DR