IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 144

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–60
Table 5–36. Test Interface Signals—Soft IP Implementation
PCI Express Compiler User Guide
test_in[31:0]
test_out[511:0] or [8:0] for ×1 or ×4
test_out[127:0] or [8:0] for ×8
Test Interface Signals—Soft IP Implementation
Signal
Table 5–36
describes the test signals for the soft IP implementation.
I
I/O
O
The test_in bus provides runtime control for specific IP core
features. For normal operation, this bus can be driven to all 0's. The
following bits are defined:
[0]—Simulation mode. This signal can be set to 1 to accelerate
MegaCore function initialization by changing many initialization
count.
[4:1]—reserved.
[6:5] Compliance test mode. Disable/force compliance mode:
■
■
[11:8]—hardwired to b’0011.
[15:13]—selects the lane.
[32:16, 12]—reserved.
The test_out bus allows you to monitor the PIPE interface When you
choose the 9-bit test_out bus width, a subset of the test_out
signals are brought out as follows:
■
■
The following bits are defined when you choose the larger bus:
■
■
■
■
■
■
■
■
■
■
■
bit 0—completely disables compliance mode; never enter
compliance mode.
bit 1—forces compliance mode. Forces entry to compliance mode
when timeout is reached in polling.active state (and not all lanes
have detected their exit condition).
bits[4:0] = test_out[4:0] on the ×8 IP core.
bits[4:0] = test_out[324:320] on the ×4/×1 IP core.
bits[8:5] = test_out[91:88] on the ×8 IP core.
bits[8:5] = test_out[411:408] on the ×4/×1 IP core.
[7:0]—txdata.
[8]—txdatak.
[9]—txdetectrx.
[10]—txelecidle.
[11]—txcompl.
[12]—rxpolarity.
[14:13]—powerdown.
[22:15]—rxdata.
[23]—rxdatak.
[24]—rxvalid.
[63:25]—reserved.
Description
December 2010 Altera Corporation
Chapter 5: IP Core Interfaces
Test Signals