IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 292
![IP CORE Renewal Of IP-PCIE/1](/photos/24/19/241936/4696145_sml.jpg)
IPR-PCIE/1
Manufacturer Part Number
IPR-PCIE/1
Description
IP CORE Renewal Of IP-PCIE/1
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCIE/1
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x1 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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16–8
Figure 16–3. System Port Connections
Generate the SOPC Builder System
Simulate the SOPC Builder System
PCI Express Compiler User Guide
1
Table 16–6
Follow these steps to generate the SOPC Builder system:
1. On the System Generation tab, turn on Simulation. Create project simulator files
2. After SOPC Builder reports successful system generation, click Save.
You can now simulate the system using any Altera-supported third party simulator,
compile the system in the Quartus II software, and configure an Altera device.
SOPC Builder automatically sets up the simulation environment for the generated
system. SOPC Builder creates the pcie_top_sim subdirectory in your project directory
and generates the required files and models to simulate your PCI Express system.
This section of the design example uses the following components:
■
■
■
You can also use any other supported third-party simulator to simulate your design.
The PCI Express testbench files are located in the
\sopc_pci\pci_express_compiler_examples\sopc\testbench directory.
and click Generate.
The system you created using SOPC Builder
Simulation scripts created by SOPC Builder in the \sopc_pcie\pcie_top_sim
directory
The ModelSim-Altera Edition software
illustrates the required connections.
Chapter 16: SOPC Builder Design Example
December 2010 Altera Corporation
Generate the SOPC Builder System
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