IPR-PCIE/1 Altera, IPR-PCIE/1 Datasheet - Page 340

• Manufacturer Part Number: IPR-PCIE/1
• Description: IP CORE Renewal Of IP-PCIE/1
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

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PCI Express Compiler User Guide
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Altera recommends disabling the OpenCore Plus feature when compiling with this
flow. (On the Assignments menu, click Settings. Under Compilation Process
Settings, click More Settings. Under Disable OpenCore Plus hardware evaluation
select On.)
1. Open a Quartus II project.
2. To run initial logic synthesis on your top-level design, on the Processing menu,
3. Perform one of the following steps:
4. On the Assignments menu, click Design Partitions Window. The design partition,
5. To turn on incremental compilation, follow these steps:
6. To run a full compilation, on the Processing menu, click Start Compilation. Run
7. After timing is met, you can preserve the timing of the partition in subsequent
Information for the partition netlist is saved in the db folder. Do not delete this folder.
point to Start, and then click Start Analysis & Synthesis. The design hierarchy
appears in the Project Navigator.
a. For Avalon-ST designs, in the Project Navigator, expand the
b. For descriptor/data interface designs, in the Project Navigator, expand the
Partition_<variation_name>_ or Partition_<variation_name>_icm for
descriptor/data designs, appears. Under Netlist Type, right-click and click
Post-Synthesis.
a. On the Assignments menu, click Settings.
b. In the Category list, expand Compilation Process Settings.
c. Click Incremental Compilation.
d. Under Incremental Compilation, select Full incremental compilation.
Design Space Explorer (DSE) if required to achieve timing requirements. (On the
Tools menu, click Launch Design Space Explorer.)
compilations by using the following procedure:
a. On the Assignments menu, click Design Partition Window.
b. Under the Netlist Type for the Top design partition, double-click to select
c. Right-click Partition Name column to bring up additional design partition
d. Under Fitter Preservation level and double-click to select Placement And
<variation_name>_icm module as follows: <variation_name>_example_top ->
<variation_name>_example_pipen1b:core ->. Right-click
<variation_name>:epmap and click Set as Design Partition.
<variation_name>_icm module as follows: <variation_name>_example_top ->
Post-Fit.
options and select Fitter Preservation Level.
Routing.
<variation_name>_example_pipen1b:core ->
<variation_name>_icm:icm_epmap. Right-click <variation_name>_icm and click
Set as Design Partition.
Recommended Incremental Compilation Flow
December 2010 Altera Corporation
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