EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 129
EP3C16F256I7N
Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Altera Corporation-Preliminary
March 2007
■
Figure 6–17
using the automatic loss of clock detection. Here, the inclk0 signal
remains low. After the inclk0 signal remains low for approximately two
clock cycles, the clock sense circuitry drives the clkbad[0] signal high.
Also, because the reference clock signal is not toggling, the switchover
state machine controls the multiplexer through the clksw signal to
switch to inclk1.
Use the clkswitch input for user- or system-controlled switch
conditions. This is possible for same-frequency switchover or to
switch between inputs of different frequencies. For example, if
inclk0 is 66 MHz and inclk1 is 200 MHz, you must control the
switchover because the automatic clock-sense circuitry cannot
monitor primary and secondary clock frequencies with a frequency
difference of more than 20%. This feature is useful when clock
sources can originate from multiple cards on the backplane,
requiring a system-controlled switchover between frequencies of
operation. You should choose the secondary clock frequency so the
VCO operates within the recommended frequency range. You
should also set the m, n, and c counters accordingly to keep the VCO
operating frequency in the recommended range.
shows a waveform example of the switchover feature when
Cyclone III Device Handbook, Volume 1
Hardware Features
6–29
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