EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 39

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Figure 2–7. Direct Link Connection
LAB Control
Signals
Altera Corporation-Preliminary
March 2007
Direct link interconnect from
block, embedded multiplier,
left LAB, M9K memory
PLL, or IOE output
interconnect
Direct link
to left
Interconnect
LAB Interconnects
LAB local interconnect is driven by column and row interconnects and LE
outputs within the same LAB. Neighboring LABs, PLLs, M9K RAM
blocks, and embedded multipliers from the left and right can also drive
the local interconnect of a LAB through the direct link connection. The
direct link connection feature minimizes the use of row and column
interconnects, providing higher performance and flexibility. Each LE can
drive up to 48 LEs through fast local and direct link interconnects.
Figure 2–7
Each LAB contains dedicated logic for driving control signals to its LEs.
The control signals include:
■
■
■
■
■
You may use up to eight control signals at a time. Register packing and
the synchronous load cannot be used simultaneously.
Each LAB can have up to four non-global control signals. You can use
additional LAB control signals as long as they are global signals.
Local
Two clocks
Two clock enables
Two asynchronous clears
One synchronous clear
One synchronous load
shows the direct link connection.
Cyclone III Device Handbook, Volume 1
LAB
Direct link
interconnect
to right
Direct link interconnect from
right LAB, M9K memory
block, embedded multiplier,
PLL, or IOE output
LAB Control Signals
2–9