EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 330

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Configuring Cyclone III Devices
10–94
Cyclone III Device Handbook, Volume 1
nWE
RDY
CLKUSR
INIT_DONE
Table 10–21. Dedicated Configuration Pins on the Cyclone III Device (Part 7 of 7)
Table 10–22. Optional Configuration Pins (Part 1 of 2)
Pin Name
Pin Name
N/A if option is on.
I/O if option is off.
N/A if option is on.
I/O if option is off.
N/A in AP
mode. I/O in
non-AP
mode
N/A in AP
mode. I/O in
non-AP
mode
User Mode
User Mode
Table 10–22
configuration pins are not enabled in the Quartus II software, they are
available as general-purpose user I/O pins. Therefore, during
configuration, these pins function as user I/O pins and are tri-stated with
weak pull-up resistors.
AP
AP
Configuration
Scheme
Input
Output open-drain Status pin can be used to indicate when the device
Pin Type
describes the optional configuration pins. If these optional
Output
Input
Pin Type
Optional user-supplied clock input synchronizes the
initialization of one or more devices. This pin is
enabled by turning on the Enable user-supplied
start-up clock (CLKUSR) option in the Quartus II
software.
has initialized and is in user-mode. When
is low and during the beginning of configuration, the
INIT_DONE
an external 10 KΩ pull-up resistor. Once the option bit
to enable
(during the first frame of configuration data), the
INIT_DONE
complete, the
pulled high and the device enters user-mode. Thus,
the monitoring circuitry must be able to detect a
low-to-high transition. This pin is enabled by turning
on the Enable INIT_DONE output option in the
Quartus II software.
Active-low write enable to the parallel flash.
Driving the
indicates to the parallel flash that data on the
DATA[15..0]
WE#
Spansion S29WS-N flash.
The current implementation for AP
configuration ignores the
is recommended that you connect this pin.
Connects to the
the
INIT_DONE
RDY
pin on both the Intel P30 and the
pin is tri-stated and pulled high due to
pin will go low. When initialization is
INIT_DONE
pin on the Spansion S29WS-N flash.
nWE
Altera Corporation-Preliminary
Description
is programmed into the device
pin low during write operation
WAIT
bus is valid. Connects to the
Description
pin will be released and
pin on the Intel P30 or
RDY
pin. However it
March 2007
nCONFIG