EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 260

no-image

EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
Datasheets

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C16F256I7N
Manufacturer:
IR
Quantity:
14 520
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA31
Quantity:
214
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA
Quantity:
90
Part Number:
EP3C16F256I7N
Manufacturer:
XILINX
0
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA
0
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP3C16F256I7N
0
Configuring Cyclone III Devices
Figure 10–5. Multi-Device AS Configuration When Devices Receive the Same Data with
Multiple SRAM Object Files
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
(7)
10–24
Cyclone III Device Handbook, Volume 1
Connect the pull-up resistors to V
Connect the pull-up resistor to the V
The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed another device’s nCE pin.
The MSEL pin settings vary for different configuration voltage standards and POR time. You must set the
Cyclone III master device in AS mode and the slave devices in PS mode. To connect MSEL[3..0] for the master
device in AS mode, refer to
refer to
These are dual-purpose I/O pins. FLASH_nCE pin functions as the nCSO pin in AS configuration scheme. DATA[1]
pin functions as the ASDO pin in AS configuration scheme.
Connect the series resistor at the near end of the serial configuration device.
Connect the repeater buffers between the Cyclone III master and slave device(s) for DATA[0] and DCLK. All I/O
inputs must maintain a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers has to fit the
maximum overshoot equation outlined in
Serial Configuration
Figure
Device
Table 10–10 on page
DCLK
DATA
ASDI
nCS
10–5:
25
10 k
V
GND
(6)
CCIO
(1)
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
FLASH_nCE (5)
DATA[1] (5)
Cyclone III Master Device
10 k
Table 10–6 on page
10–46. Connect the MSEL pins directly to V
V
CCIO
Buffers (7)
CCIO
(1)
CCIO
10 k
supply of the bank the pin resides in.
MSEL[3..0]
V
CCIO
supply voltage of I/O bank that the nCEO pin resides in.
“Configuration and JTAG Pin I/O Requirements” on page
nCEO
(1)
10–15. To connect MSEL[3..0] for the slave devices in PS mode,
10 k
V
CCIO
(2)
(4)
CCIO
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
Cyclone III Slave Device
Cyclone III Slave Device
Cyclone III Slave Device
or GND.
Altera Corporation-Preliminary
MSEL[3..0]
MSEL[3..0]
MSEL[3..0]
nCEO
nCEO
nCEO
March 2007
10–13.
N.C. (3)
(4)
N.C. (3)
(4)
N.C. (3)
(4)

Related parts for EP3C16F256I7N