EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 216

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

External Memory Interfaces in Cyclone III Devices
9–2
Cyclone III Device Handbook, Volume 1
The Cyclone III external memory interface infrastructure includes the
components listed in
Altera recommends that you construct all DDR2/DDR SDRAM and
QDRII SRAM external memory interfaces using the Altera ALTMEMPHY
megafunction. You can implement the controller function using the
Altera DDR2/DDR SDRAM or QDRII SRAM memory controllers, third
party controllers, or a custom controller for unique application needs.
Figure 9–1
Memory Interface Feature
Auto-calibrating ALTMEMPHY
megafunction
Altera
user-designed memory controller
Silicon enhancements
Quartus II TimeQuest timing
analyzer
Table 9–2. Cyclone III External Memory Interface Infrastructure
®
, third party, or
shows an overview of a Cyclone III external memory interface.
Table
9–2.
Description
Manages the physical (PHY) interfaces
between the FPGA device and the
external memory devices. Comes as a
megafunction and is available in the
Quartus
Controls the PHY interface and the
interface between the PHY and the user's
application.
The Altera controllers are included with
Altera software subscriptions as part of the
IP-BASE Suite.
The phase-locked loop (PLL)
reconfiguration feature adjusts the clock
phase shifts in the system to calibrate
changes in voltage and temperature.
Two additional registers were added to
Cyclone III input/output elements (IOEs) to
enhance double-data rate I/O (DDIO)
timing.
Uses industry standard synopsys design
constraint (SDC) language to easily
support source-synchronous timing
analysis.
®
II software version 7.0 and later.
Altera Corporation-Preliminary
March 2007