EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 171

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Altera Corporation-Preliminary
March 2007
f
On-chip series termination is supported on any I/O bank. V
must be compatible for all I/O pins to enable on-chip series termination
in a given I/O bank. I/O standards that support different R
reside in the same I/O bank as long as their V
conflicting.
Impedance matching is implemented using the capabilities of the output
driver and is subject to a certain degree of variation, depending on the
process, voltage, and temperature.
Refer to the DC and Switching Characteristics chapter in volume 2 of the
Cyclone III Device Handbook, for more information about tolerance
specification.
1.5-V LVCMOS
1.2-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
Table 7–4. Selectable I/O Drivers for On-Chip Termination without
Calibration (Part 2 of 2)
50
25
50
50
25
50
25
50
25
50
25
50
-
-
Cyclone III Device Handbook, Volume 1
On-Chip Termination Support
CCIO
50
25
50
25
50
25
50
25
50
25
50
25
50
25
and V
REF
CCIO
S
are not
values can
and V
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
7–19
REF

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