EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 292

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Configuring Cyclone III Devices
10–56
Cyclone III Device Handbook, Volume 1
f
f
For more information about the MicroBlaster software driver, refer to the
AN 423: Configuring the MicroBlaster Passive Serial Software Driver
application note and source files on the Altera web site at
www.altera.com.
1
PS Configuration Using a Download Cable
In this section, the generic term “download cable” includes the Altera
USB-Blaster universal serial bus (USB) port download cable,
MasterBlaster™ serial/USB communications cable, ByteBlaster II parallel
port download cable, and the ByteBlaster MV parallel port download
cable.
In PS configuration with a download cable, an intelligent host (such as a
PC) transfers data from a storage device to the device via the USB Blaster,
MasterBlaster, ByteBlaster II, or ByteBlasterMV cable.
Upon power-up, the Cyclone III devices go through a POR. The POR
delay is dependent on the MSEL pin settings which correspond to the
configuration scheme that you select. Depending on the configuration
scheme, either a fast POR time or a standard POR time is available. The
fast POR time is 3ms < T
standard POR time is 50ms < T
ramp rate. During POR, the device resets, holds nSTATUS low, and tri-
states all user I/O pins. Once the device successfully exits POR, all user
I/O pins continue to be tri-stated. The user I/O pins and dual-purpose
I/O pins have weak pull-up resistors which are always enabled (after
POR) before and during configuration.
For information about the value of the weak pull-up resistors on the I/O
pins that are on before and during configuration, refer to the DC and
Switching Characteristics chapter of the Cyclone III Device Handbook.
The three stages of the configuration cycle are reset, configuration, and
initialization. While nCONFIG or nSTATUS are low, the device is in reset.
To initiate configuration in this scheme, the download cable generates a
low-to-high transition on the nCONFIG pin.
If you turn on the Enable user-supplied start-up clock
(CLKUSR) option in the Quartus II software, the Cyclone III
devices does not enter user mode after the MicroBlaster has
transmitted all the configuration data in the RBF file. You need
to supply enough initialization clock cycles to the CLKUSR pin to
enter user mode.
POR
< 9ms for fast configuration time. The
POR
< 200ms which has a lower power
Altera Corporation-Preliminary
March 2007