EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 335

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Hot-Socketing
Feature
Implementation
in Cyclone III
Devices
Altera Corporation-Preliminary
March 2007
the power supply can provide current to the device's V
planes. This condition can lead to latch-up and cause a low-impedance
path from V
a large amount of current, possibly causing electrical damage.
By design of the I/O buffers and hot socketing circuitry, Altera
that Cyclone III devices are immune to latch-up during hot socketing.
The hot-socketing feature disables the output buffer during power-up
(either V
generates an internal HOTSCKT signal when either V
below the threshold voltage. Designs cannot use the HOTSCKT signal for
other purposes. The HOTSCKT signal cuts off the output buffer to ensure
that no DC current (except for weak pull-up leakage current) leaks
through the pin. When V
even after the internal POR signal (not available to the FPGA fabric used
by customer designs) is released and the configuration is finished. The
CONF_DONE, nCEO, and nSTATUS pins would fail to respond, as the
output buffer cannot drive out because the hot-socketing circuitry keeps
the I/O pins tri-stated at this low V
hot-socketing circuit has been removed on these configuration output or
bidirectional pins to ensure that they are operational during
configuration. These pins are expected to drive out during power-up and
power-down sequences.
Each I/O pin has the circuitry shown in
CCINT
CC
or V
to ground within the device. As a result, the device extends
Hot Socketing and Power-On Reset in Cyclone III Devices
CCIO
supplies) or power-down. The hot-socket circuit
CC
ramps up slowly, V
Cyclone III Device Handbook, Volume 1
CC
voltage. Therefore, the
Figure
CC
11–1.
is still relatively low,
CCINT
CC
and ground
or V
CCIO
®
ensures
is
11–3