EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 186
EP3C16F256I7N
Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Cyclone III Device I/O Features
7–34
Cyclone III Device Handbook, Volume 1
For the LVPECL I/O standard:
■
■
V
To maintain an acceptable noise level on the V
output switching noise from shifting the V
the placement of single-ended voltage referenced I/Os with respect to
V
placing single-ended pads in Cyclone III devices.
1
Input Pads
Each V
Each V
devices. This is irrespective of V
by the Cyclone III architecture.
Output Pads
When no voltage referenced input or bidirectional pads exist in a bank,
there is no limit to the number of output pads that can be implemented in
that bank. When a voltage referenced input exists, each V
pair supports nine outputs for Fineline BGA packages or five outputs for
QFP packages. Any non-SSTL and non-HSTL output can be no closer
than two pads away from a V
Altera recommends that any SSTL or HSTL output, except for pintable
defined DQ and DQS outputs (when used for DDR/DDR2/QDRII
applications), to be no closer than two pads away from a V
maintain acceptable noise levels. See
page 7–37
Bidirectional Pads
Bidirectional pads must satisfy input and output guidelines
simultaneously. See
details about guidelines for DQ and DQS pad placement.
REF
REF
Single-ended inputs can be no closer than four pads away from an
LVPECL input pad.
Single-ended outputs can be no closer than five pads away from an
LVPECL input pad.
pads and V
Pad Placement Guidelines
REF
REF
The Quartus II software automatically does all the calculations
in this section.
pad supports up to 32 input pads for FineLine BGA devices.
pad supports up to 21 input pads for quad flat pack (QFP)
for details about guidelines for DQ and DQS pad placement.
CCIO
“DDR/DDR2 and QDRII Pads” on page 7–37
and ground pairs. Use the following guidelines for
REF
CCIO
pad to maintain acceptable noise levels.
and ground pairs and is guaranteed
“DDR/DDR2 and QDRII Pads” on
REF
Altera Corporation-Preliminary
rail, there are restrictions on
CCIO
supply and to prevent
CCIO
REF
and ground
March 2007
pad to
for
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