EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 267

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Altera Corporation-Preliminary
March 2007
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
Spansion Active Parallel × 16 (AP
Standard POR) (1), (2),
Intel Active Parallel x16 (AP Standard
POR) (1), (2),
Table 10–8. Cyclone III MSEL Pin Settings for AP Configuration Schemes (Part 2 of 2)
These schemes support the remote system upgrade feature. Remote update mode is supported when using remote
system upgrade feature. You can enable or disable remote update mode with an option setting in the Quartus II
software. For more information about the remote system upgrade feature, refer to the Remote System Upgrade with
Cyclone III Devices chapter in the Cyclone III Device Handbook.
Some of the smaller Cyclone III devices or package options do not support the AP configuration scheme. For more
information, refer to
In the AP configuration scheme, the commodity parallel flash is used as configuration memory. For information
about the supported families for the commodity parallel flash, refer to
Configuration voltage standard applied to V
Some of the smaller Cyclone III devices or package options do not support the AP configuration scheme and do
not have the MSEL[3] pin. For information about the supported configuration schemes across device densities and
package options, refer to
You must follow specific requirements when interfacing Cyclone III devices with 2.5V/3.0V/3.3V configuration
voltage standards. For information on the requirements, refer to
on page
Table
Configuration Scheme
10–13.
(3)
10–8:
(3)
Table 10–2 on page
Table 10–2 on page
AP Configuration Supported Flash Memories
The AP configuration controller in Cyclone III devices is designed to
interface with the StrataFlash
from Intel and the S29WSxxxN MirrorBit
which are two industry standard flash families. Unlike serial
configuration devices, both of the flash families supported in AP
configuration scheme are designed to interface with microprocessors. By
configuring from a industry standard microprocessor flash which allows
access to the flash once in user mode, the AP configuration scheme allows
you to combine configuration data and user data (microprocessor boot
code) on the same flash memory.
The Intel P30 flash family and the Spansion S29WS-N flash family are
similar because both support a continuous synchronous burst read mode
at 40MHz DCLK frequency for reading data from the flash. Additionally,
the Intel P30 and Spansion S29WS-N flash families have a near identical
pin-out and adopt similar protocols for data access.
1
Cyclone III devices use a 40 MHz oscillator for the AP
configuration scheme.
10–5.
MSEL3
CCIO
10–5.
(5)
1
1
Active Parallel Configuration (Supported Flash Memories)
.
MSEL2
(5)
0
0
®
“Configuration and JTAG Pin I/O Requirements”
Embedded Memory (P30) flash family
Cyclone III Device Handbook, Volume 1
MSEL1
Table 10–9 on page
1
1
™
flash family from Spansion,
MSEL0
0
1
10–32.
Voltage Standard
Configuration
3.0/2.5 V
1.8 V
(4)
10–31
(6)