EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 206

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

High-Speed Differential Interfaces in Cyclone III Devices
Figure 8–15. PPDS Interface with Dedicated Output Buffer on the Left and Right I/O Banks
Figure 8–16. PPDS Interface with External Resistor Network on the Top and Bottom I/O Banks
Note to
(1)
8–16
Cyclone III Device Handbook, Volume 1
The
Figure
R
S
and
Cyclone III Device
PPDS Transmitter
Non-Dedicated
8–16:
R
P
f
Cyclone III Device
Dedicated PPDS
values are pending device characterization.
Trasnmitter
LVPECL I/O Support in Cyclone III Devices
The LVPECL I/O standard is a differential interface standard that
requires a 2.5-V V
video graphics, telecommunications, data communications, and clock
distribution. The high-speed, low-voltage swing LVPECL I/O standard
uses a positive power supply. Cyclone III devices support the LVPECL
input standard at the dedicated clock input pins only. The LVPECL
standard does not require an input reference voltage; however, it does
require an external 100-Ω termination resistor between the two signals at
the input buffer.
See the Cyclone III Device Datasheet: DC and Switching Characteristics
chapter in Volume 2 of the Cyclone III Device Handbook for the LVPECL
I/O standard electrical specification.
Resistor Network
R S
R S
R P
CCIO
50 Ω
50 Ω
. This standard is used in applications involving
50 Ω
50 Ω
100 Ω
100 Ω
Altera Corporation-Preliminary
PPDS Receiver
PPDS Receiver
March 2007