EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 379

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Altera Corporation-Preliminary
March 2007
Table 14–2
devices.
Boundary-Scan Cells of a Cyclone III Device I/O Pin
The Cyclone III device 3-bit boundary-scan cell (BSC) consists of a set of
capture registers and a set of update registers. The capture registers can
connect to internal device data via the OUTJ, OEJ, and PIN_IN signals,
while the update registers connect to external data through the PIN_OUT,
and PIN_OE signals. The global control signals for the IEEE Std. 1149.1
BST registers (such as shift, clock, and update) are generated internally by
the TAP controller. The MODE signal is generated by a decode of the
instruction register. The HIGHZ signal is high when executing the HIGHZ
instruction. The data signal path for the boundary-scan register runs from
the SDI signal to the SDO signal. The scan register begins at the TDI pin
and ends at the TDO pin of the device.
Figure 14–4
Table 14–2. Cyclone III Boundary-Scan Register Length
shows the boundary-scan register length for Cyclone III
shows the Cyclone III device's user I/O boundary-scan cell.
EP3C120
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
Device
EP3C5
IEEE Std. 1149.1 Boundary-Scan Register
Cyclone III Device Handbook, Volume 1
Boundary-Scan Register Length
1080
1632
1164
1314
1620
603
603
732
14–5