EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 181

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Altera Corporation-Preliminary
March 2007
Each Cyclone III I/O bank has a V
voltage-referenced I/O standards. When using V
properly connect each V
event you do not use these pins as V
I/O pins. However, they will have slightly higher pin capacitance than
regular user I/O pins when used with regular user I/O pins.
summarizes the number of V
Notes to
(1)
(2)
(3)
(4)
Differential LVPECL
EP3C5
EP3C10
EP3C16
EP3C25
Table 7–6. Cyclone III I/O Standards Support (Part 2 of 2)
Table 7–7. Number of V
Device
These differential I/O standards are only supported for clock inputs and
dedicated
Dedicated LVDS I/O standard is supported in row I/O banks only. LVDS I/O
standard in column I/O banks require external resistors network.
This I/O standard is supported for outputs only.
This I/O standard is supported for clock inputs only.
I/O Standard
Table
PLL_OUT
7–6:
Package
EQFP
FBGA
EQFP
FBGA
EQFP
PQFP
FBGA
FBGA
EQFP
PQFP
FBGA
FBGA
outputs.
REF
REF
(4)
1
Pins Per I/O Banks (Part 1 of 2)
pin to the appropriate voltage level. In the
Pin Count
REF
(4)
2
144
256
144
256
144
240
256
484
144
240
256
324
pins in each I/O bank.
REF
Cyclone III Device Handbook, Volume 1
REF
(4)
3
bus to accommodate
pins, you may use them as regular
1
1
1
1
1
2
2
2
2
1
1
1
1
I/O Banks
(4)
4
2
1
1
1
1
2
2
2
2
1
1
1
1
REF
(4)
5
3
1
1
1
1
2
2
2
2
1
1
1
1
pins, you must
I/O Banks
4
1
1
1
1
2
2
2
2
1
1
1
1
(4)
6
5
1
1
1
1
2
2
2
2
1
1
1
1
Table 7–7
(4)
7
6
1
1
1
1
2
2
2
2
1
1
1
1
I/O Banks
7
1
1
2
2
1
1
1
1
2
2
1
1
7–29
(4)
8
8
1
1
1
1
2
2
2
2
1
1
1
1