EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 84

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Memory Blocks in Cyclone III Devices
Figure 4–23. Same Port Read-During Write: New Data Mode
Figure 4–24. Same Port Read-During-Write: Old Data Mode
4–30
Cyclone III Device Handbook, Volume 1
q_a (asynch)
q_a (asynch)
address_a
address_a
wren_a
rden_a
wren_a
data_a
data_a
rden_a
clk_a
clk_a
Mixed-Port Read-During-Write Mode
This mode applies to a RAM in simple or true dual-port mode, which has
one port reading and the other port writing to the same address location
with the same clock.
In this mode, you also have two output choices: “Old Data” or “Don't
Care”. In “Old Data” mode, a read-during-write operation to different
ports causes the RAM outputs to reflect the old data at that address
location. In “Don't Care” mode, the same operation results in a "Don't
Care" or unknown value on the RAM outputs.
A
A
a0(old data)
A
a0
a0
B
B
B
A
C
C
B
C
D
D
a1(old data)
D
a1
a1
Altera Corporation-Preliminary
E
E
D
E
F
F
E
F
March 2007

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