NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 213

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

Functional Description
5.19
Table 86.
5.19.1
5.19.1.1
5.19.1.2
Intel
®
ICH8 Family Datasheet
USB EHCI Host Controllers (D29:F7 and D26:F7)
The ICH8 contains two Enhanced Host Controller Interface (EHCI) host controllers
which support up to ten USB 2.0 high-speed root ports. USB 2.0 allows data transfers
up to 480 Mb/s using the same pins as the ten USB full-speed/low-speed ports. The
ICH8 contains port-routing logic that determines whether a USB port is controlled by
one of the UHCI controllers or by one of the EHCI controllers. USB 2.0 based Debug
Port is also implemented in the ICH8.
A summary of the key architectural differences between the USB UHCI host controllers
and the EHCI host controller are shown in
UHCI vs. EHCI
EHC Initialization
The following descriptions step through the expected ICH8 Enhanced Host Controller
(EHC) initialization sequence in chronological order, beginning with a complete power
cycle in which the suspend well and core well have been off.
BIOS Initialization
BIOS performs a number of platform customization steps after the core well has
powered up. Contact your Intel Field Representative for additional ICH8 BIOS
information.
Driver Initialization
See Chapter 4 of the Enhanced Host Controller Interface Specification for Universal
Serial Bus, Revision 1.0.
Accessible by
Memory Data Structure
Differential Signaling Voltage
Ports per Controller
Parameter
I/O space
Single linked list
3.3 V
2
USB UHCI
Table
Memory Space
Separated in to Periodic and Asynchronous
lists
400 mV
6 (controller #1) and 4 (Controller #2)
86.
USB EHCI
213