NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 774
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
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20.2.5.6
774
JID0—JEDEC-ID n Register
Memory Address:VTBA + (n*8)h
Default Value:
31:24
23:16
15:8
Bits
15:8
Bits
7:0
7:4
1:0
3
2
Reserved
SPI Component Device ID 1: This identifies the second byte of the Device ID of the
SPI Flash Component. This is the third byte returned by the Read JEDEC-ID command
(opcode 9Fh).
SPI Component Device ID 0: This identifies the first byte of the Device ID of the SPI
Flash Component. This is the second byte returned by the Read JEDEC-ID command
(opcode 9Fh).
SPI Component Vendor ID: This identifies the one byte Vendor ID of the SPI Flash
Component. This is the first byte returned by the Read JEDEC-ID command (opcode
9Fh).
Erase Opcode (EO): This register is programed with the Flash erase instruction opcode
required by this vendors Flash component.
Note: If there is more than one component, both components must use the same Erase
Opcode.
Reserved
Write Status Required (WSR):
0 = No Enable write to the status register (50h) opcode is required to write to the SPI
1 = Enable write to the status register (50h) opcode is required to write to the SPI flash Status
NOTE: If there is more than one component, both components must use the same Write Status
Write Granularity (WG):
0 = 1 Byte
1 = 64 Byte
All Other Settings: Reserved
NOTE: If more than one Flash component exists, this field must be set to the lowest
Block/Sector Erase Size (BES): This field identifies the erasable sector size for all
Flash components.
Valid Bit Settings:
00 = 256 Byte
01 = 4 KB
10 = Reserved for future use
11 = 64KB
NOTE: If supporting more than one Flash component, all flash components must have
flash Status Register(s) prior to write or erase to remove SPI flash protection.
Register(s) prior to write or erase to remove SPI flash protection.
Required setting. SPI Protection is removed by writing 00h to SPI flash Status Register(s).
common write granularity of the different Flash components.
identical Block/ Sector erase sizes.
Description
Description
Attribute:
Size:
Serial Peripheral Interface (SPI)
32 bits
Intel
®
ICH8 Family Datasheet
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