NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 478
NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
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12.1.23
Note:
12.1.24
Note:
478
SDMA_CNT—Synchronous DMA Control Register
(SATA–D31:F2)
Address Offset: 48h
Default Value:
This register is R/W to maintain software compatibility and enable parallel ATA
functionality when the PCI functions are combined. These bits have no effect on SATA
operation unless otherwise noted.
SDMA_TIM—Synchronous DMA Timing Register
(SATA–D31:F2)
Address Offset: 4Ah
Default Value:
This register is R/W to maintain software compatibility and enable parallel ATA
functionality when the PCI functions are combined. These bits have no effect on SATA
operation, unless otherwise noted.
15:14
13:12
11:10
7:4
Bit
Bit
3
2
1
0
Reserved
Secondary Drive 1 Synchronous DMA Mode Enable (SSDE1) — R/W.
0 = Disable (default)
1 = Enable Synchronous DMA mode for secondary channel drive 1
Secondary Drive 0 Synchronous DMA Mode Enable (SSDE0) — R/W.
0 = Disable (default)
1 = Enable Synchronous DMA mode for secondary drive 0.
Primary Drive 1 Synchronous DMA Mode Enable (PSDE1) — R/W.
0 = Disable (default)
1 = Enable Synchronous DMA mode for primary channel drive 1
Primary Drive 0 Synchronous DMA Mode Enable (PSDE0) — R/W.
0 = Disable (default)
1 = Enable Synchronous DMA mode for primary channel drive 0
Reserved
Secondary Drive 1 Cycle Time (SCT1) — R/W. For Ultra ATA mode. The setting of
these bits determines the minimum write strobe cycle time (CT). The DMARDY#-to-
STOP (RP) time is also determined by the setting of these bits.
Reserved
00 = CT 4 clocks,
01 = CT 3 clocks,
10 = CT 2 clocks,
(33 MHz clock)
11 = Reserved
RP 6 clocks
RP 5 clocks
RP 4 clocks
SCB1 = 0
00h
0000h
–
4Bh
01 = CT 3 clocks,
10 = CT 2 clocks,
(66 MHz clock)
00 = Reserved
11 = Reserved
RP 8 clocks
RP 8 clocks
SCB1 = 1
Description
Description
Attribute:
Size:
Attribute:
Size:
SATA Controller Registers (D31:F2)
R/W
8 bits
R/W
16 bits
(133 MHz clock)
Intel
01 = CT 3 clocks,
FAST_SCB1 = 1
00 = Reserved
10 = Reserved
11 = Reserved
RP 16 clocks
®
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