NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 465
NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
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SATA Controller Registers (D31:F2)
12
12.1
Note:
Table 121.
Intel
®
ICH8 Family Datasheet
SATA Controller Registers
(D31:F2)
PCI Configuration Registers (SATA–D31:F2)
Address locations that are not shown should be treated as Reserved.
All of the SATA registers are in the core well. None of the registers can be locked.
SATA Controller PCI Register Address Map (SATA–D31:F2) (Sheet 1 of 2)
2Ch–2Dh
00h–01h
02h–03h
04h–05h
06h–07h
10h–13h
14h–17h
18h–1Bh
1Ch–1Fh
20h–23h
24h–27h
40h–41h
42h–43h
2Eh–2Fh
Offset
0Dh
3Dh
08h
09h
0Ah
0Bh
34h
3Ch
44h
48h
Mnemonic
PCMD_BAR
SCMD_BAR
SDMA_CNT
SCNL_BAR
PCNL_BAR
IDE_TIMP
IDE_TIMS
SIDETIM
PCICMD
SIDPBA
INT_PN
PCISTS
INT_LN
ABAR /
PMLT
SVID
SCC
BCC
BAR
VID
DID
RID
SID
CAP
PI
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Programming Interface
Sub Class Code
Base Class Code
Primary Master Latency Timer
Primary Command Block Base Address
Primary Control Block Base Address
Secondary Command Block Base
Address
Secondary Control Block Base Address
Legacy Bus Master Base Address
AHCI Base Address / SATA Index Data
Pair Base Address
Subsystem Vendor Identification
Subsystem Identification
Capabilities Pointer
Interrupt Line
Interrupt Pin
Primary IDE Timing
Secondary IDE Timing
Slave IDE Timing
Synchronous DMA Control
Register Name
See register
See register
See register
See register
See register
description.
00000001h
00000000h
00000001h
00000001h
00000001h
00000001h
description
description
description
description
Default
8086h
0000h
02B0h
0000h
0000h
0000h
0000h
01h
00h
80h
00h
00h
00h
See register
See register
See register
description
description
description
R/WC, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/WO
R/WO
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
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