NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 489

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

SATA Controller Registers (D31:F2)
12.1.35
.
Intel
®
ICH8 Family Datasheet
SCLKCG—SATA Clock Gating Control Register
Address Offset: 94h-97h
Default Value:
(Desktop
(Mobile
27:24
27:24
Only)
Only)
22:9
8:0
Bit
31
30
28
23
Reserved
SATA Clock Request Enabled (SCRE) — R/W.
0 = SATA Clock Request protocol is disabled. SATACLKREQ# pin when in native
1 = SATA Clock Request protocol is enabled. SATACLKREQ# pin when in native
Reserved
Reserved
SATA Initialization Field 3 (SIF3) — R/W. BIOS shall always program this
register to the value 0Ah. All other values are reserved.
SATA Initialization Field 2 (SIF2) — R/W. BIOS shall always program this
register to the value 0b. All other values are reserved.
Reserved
SATA Initialization Field 1 (SIF1) — R/W. BIOS shall always program this
register to the value 180h. All other values are reserved.
function will always output '0' to keep the SATA clock running.
function will behave as the Serial ATA clock request to the system clock chip.
00000000h
Description
Attribute:
Size:
R/W
32 bits
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