NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 843
NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
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Electrical Characteristics
Table 165.
Table 166.
Table 167.
1
Intel
®
ICH8 Family Datasheet
Sym
Sym
Sym
t143
t144
t145
t146
t150
t151
t152
t153
t154
t155
t156
t157
t160
t161
t162
t163
t164
t165
Intel
LPC Timing
Miscellaneous Timings
Time duration for which HDA_SDOUT is valid before
HDA_BIT_CLK edge.
Time duration for which HDA_SDOUT is valid after
HDA_BIT_CLK edge.
Setup time for HDA_SDIN[3:0] at rising edge of
HDA_BIT_CLK
Hold time for HDA_SDIN[3:0] at rising edge of
HDA_BIT_CLK
LAD[3:0] Valid Delay from PCICLK Rising
LAD[3:0] Output Enable Delay from PCICLK Rising
LAD[3:0] Float Delay from PCICLK Rising
LAD[3:0] Setup Time to PCICLK Rising
LAD[3:0] Hold Time from PCICLK Rising
LDRQ[1:0]# Setup Time to PCICLK Rising
LDRQ[1:0]# Hold Time from PCICLK Rising
LFRAME# Valid Delay from PCICLK Rising
SERIRQ Setup Time to PCICLK Rising
SERIRQ Hold Time from PCICLK Rising
RI#, EXTSMI#, GPIO, USB Resume Pulse Width
SPKR Valid Delay from OSC Rising
SERR# Active to NMI Active
IGNNE# Inactive from FERR# Inactive
®
High Definition Audio Timing
Parameter
Parameter
Parameter
Min
Min
Min
15
—
—
—
12
0
7
2
—
7
7
0
2
2
7
0
0
2
Max
Max
200
200
230
Max
—
—
—
—
—
—
—
11
28
12
—
—
—
—
—
RTCCLK
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig
Fig
47
47
47
47
Fig
24
24
26
23
23
27
25
24
24
24
24
23
Notes
Notes
Notes
843
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