NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 666

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

17.2
Table 140.
666
Intel
Configuration Registers
(Intel
The base memory location for these memory-mapped configuration registers is
specified in the HDBAR register (D27:F0, offset 10h and D27:F0, offset 14h). The
individual registers are then accessible at HDBAR + Offset as indicated in the following
table.
These memory-mapped registers must be accessed in byte, word, or DWord quantities.
Intel
(Intel
HDBAR +
0Ch–0Dh
1Ah–1Bh
4Ah–4Bh
00h–01h
04h–05h
06h–07h
08h–0Bh
0Eh–0Fh
10h–11h
12h–13h
14h–17h
18h–19h
1Ch–1Fh
20h–23h
24h–27h
30h–33h
34h–37h
40h–43h
44h–47h
48h–49h
50h–53h
54h–57h
58h–59h
Offset
4Ch
4Dh
02h
03h
4Eh
®
®
High Definition Audio PCI Register Address Map
®
High Definition Audio D27:F0) (Sheet 1 of 4)
®
High Definition Audio Memory Mapped
High Definition Audio— D27:F0)
ECAP
OUTSTRMPAY
INSTRMPAY
Rsv
Rsv
CORBUBASE
CORBLBASE
RIRBUBASE
RIRBLBASE
Mnemonic
CORBSIZE
STATESTS
CORBCTL
CORBWP
WAKEEN
WALCLK
CORBRP
CORBST
RIRBWP
OUTPAY
INTSTS
INTCTL
SSYNC
INPAY
GCAP
VMIN
GSTS
VMAJ
GCTL
Global Capabilities
Minor Version
Major Version
Output Payload Capability
Input Payload Capability
Global Control
Wake Enable
State Change Status
Global Status
Reserved
Extended Capabilities
Output Stream Payload Capability
Input Stream Payload Capability
Reserved
Interrupt Control
Interrupt Status
Wall Clock Counter
Stream Synchronization
CORB Lower Base Address
CORB Upper Base Address
CORB Write Pointer
CORB Read Pointer
CORB Control
CORB Status
CORB Size
RIRB Lower Base Address
RIRB Upper Base Address
RIRB Write Pointer
Intel
Register Name
®
High Definition Audio Controller Registers (D27:F0)
Intel
0000h
00000001h
0030h
0018h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
Default
4401h
003Ch
001Dh
0000h
0000h
0000h
0000h
0000h
0000h
®
00h
01h
00h
00h
42h
ICH8 Family Datasheet
R/W, RO
R/W, RO
R/W, RO
Access
R/WC
R/WC
R/WC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO