NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 713
NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
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PCI Express* Configuration Registers
18.1.27
18.1.28
Intel
®
ICH8 Family Datasheet
DSTS—Device Status Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 4Ah–4Bh
Default Value:
LCAP—Link Capabilities Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 4Ch
Default Value:
31:24
23:21
20
15:6
Bit
Bit
5
4
3
2
1
0
Reserved
Transactions Pending (TDP) — RO. This bit has no meaning for the root port since
only one transaction may be pending to the Intel
occur until it has already returned to 0.
AUX Power Detected (APD) — RO. The root port contains AUX power for wakeup.
Unsupported Request Detected (URD) — R/WC. Indicates an unsupported request
was detected.
Fatal Error Detected (FED) — R/WC. Indicates a fatal error was detected.
0 = Fatal error has not occurred.
1 = A fatal error occurred from a data link protocol error, link training error, buffer
Non-Fatal Error Detected (NFED) — R/WC. Indicates a non-fatal error was detected.
0 = Non-fatal error has not occurred.
1 = A non-fatal error occurred from a poisoned TLP, unexpected completions,
Correctable Error Detected (CED) — R/WC. Indicates a correctable error was
detected.
0 = Correctable error has not occurred.
1 = The port received an internal correctable error from receiver errors / framing
Port Number (PN) — RO. This field indicates the port number for the root port. This
value is different for each implemented port:
Reserved
Link Active Reporting Capable (LARC) — RO. Hardwired to 1 to indicate that this port
supports the optional capability of reporting the DL_Active state of the Data Link
Control and Management State Machine.
Function
overflow, or malformed TLP.
unsupported requests, completer abort, or completer timeout.
errors, TLP CRC error, DLLP CRC error, replay num rollover, replay timeout.
D28:F0
D28:F1
D28:F2
D28:F3
D28:F4
D28:F5
0010h
See bit description
–
4Fh
Port #
1
2
3
4
5
6
Value of PN Field
01h
02h
03h
04h
05h
06h
Description
Description
Attribute:
Size:
Attribute:
Size:
®
ICH8, so a read of this bit cannot
R/WC, RO
16 bits
R/WO, RO
32 bits
713
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