NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 723

• Manufacturer Part Number: NH82801HEM S LA5R
• Manufacturer: Intel

Specifications of NH82801HEM S LA5R

• Lead Free Status / RoHS Status: Compliant

PCI Express* Configuration Registers
18.1.43
Intel
®
ICH8 Family Datasheet
PMC—PCI Power Management Capabilities Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: A2h
Default Value:
15:11
8:6
2:0
Bit
10
9
5
4
3
PME_Support (PMES) — RO. Indicates PME# is supported for states D0, D3
D3
for some legacy operating systems to enable PME# in devices connected behind this
root port.
D2_Support (D2S) — RO. The D2 state is not supported.
D1_Support (D1S) — RO The D1 state is not supported.
Aux_Current (AC) — RO. Reports 375 mA maximum suspend well current required
when in the D3
Device Specific Initialization (DSI) — RO. Indicates that no device-specific initialization
is required.
Reserved
PME Clock (PMEC) — RO. Indicates that PCI clock is not required to generate PME#.
Version (VS) — RO. Indicates support for Revision 1.1 of the PCI Power Management
Specification.
COLD
. The root port does not generate PME#, but reporting that it does is necessary
C802h
–
COLD
A3h
state.
Description
Attribute:
Size:
RO
16 bits
HOT
and
723