EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 115

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
DSP Block Control Signals
Table 4–9. DSP Block Dynamic Signals (Part 1 of 2)
© November 2009 Altera Corporation
■
■
output_round
chainout_round
output_saturate
chainout_saturate
signa
signb
Signal Name
You can use the rounding and saturation function described above in regular
supported multiplication operations, as specified in
for accumulation type operations, use the following convention:
The functionality of the round logic unit is in the format of:
Result = RND[
Likewise, the functionality of the saturation logic unit is in the format of:
Result = SAT[
If both the rounding and saturation logic units are used for an accumulation type of
operation, the format is:
Result = SAT[RND[
The Stratix IV DSP block is configured using a set of static and dynamic signals. You
can configure the DSP block dynamic signals and can be set to toggle or not at run
time.
Table 4–9
Signed/unsigned control for all multipliers and adders.
■
■
■
■
■
■
Round control for first stage round and saturation block.
■
■
Round control for second stage round and saturation block.
chainout_round = 1 for rounding multiply output
chainout_round = 0 for normal multiply output
Saturation control for first stage round and saturation block for
Q-format multiply. If both rounding and saturation is enabled,
saturation is done on the rounded result.
output_saturate = 1 for saturation support
output_saturate = 0 for no saturation support
Saturation control for second stage round and saturation block for
Q-format multiply. If both rounding and saturation is enabled,
saturation is done on the rounded result.
chainout_saturate = 1 for saturation support
chainout_saturate = 0 for no saturation support
signa for “multiplicand” input bus to dataa[17:0] each
multiplier.
signb for “multiplier” input bus datab[17:0] to each
multiplier.
signa = 1, signb = 1 for signed-signed multiplication
signa = 1, signb = 0 for signed-unsigned multiplication
signa = 0, signb = 1 for unsigned-signed multiplication
signa = 0, signb = 0 for unsigned-unsigned multiplication
output_round = 1 for rounding on multiply output
output_round = 0 for normal multiply output
S
S
(A × B)], when used for an accumulation type of operation.
lists the dynamic signals for the DSP block.
(A × B)], when used for an accumulation type of operation.
S
(A × B)]]
Function
Table 4–2 on page
Stratix IV Device Handbook Volume 1
4–8. However,
Count
2
1
1
1
1
4–33