EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 471

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1: Stratix IV Transceiver Architecture
Transceiver Block Architecture
© March 2010 Altera Corporation
Figure 1–28. AC-Coupled Link
The following protocols supported by Stratix IV GX and GT devices mandate
AC-coupled links:
■
■
■
■
■
Stratix IV GT devices allow the high-speed links to be AC-coupled for the entire data
rate range between 2.488 Gbps and 11.3 Gbps.
DC-Coupled Links
In a DC-coupled link, the transmitter DC V
The link V
off-chip receiver termination and biasing circuitry must ensure compatibility between
the transmitter and receiver V
PCI Express (PIPE)
Gigabit Ethernet
Serial RapidIO
XAUI
SDI
Transmitter
CM
TX Termination
depends on the transmitter V
TX
V
CM
CM
.
Figure 1–29
Physical Medium
Physical Medium
CM
CM
and the receiver V
shows a DC-coupled link.
is seen unblocked at the receiver buffer.
AC Coupling
Capacitor
AC Coupling
Capacitor
RX
V
CM
Stratix IV Device Handbook Volume 2
RX Termination
CM
Receiver
. The on-chip or
1–33