EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 774
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP4SGX110DF29C3N PDF datasheet
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- EP4SGX110DF29C3N PDF datasheet #5
- EP4SGX110DF29C3N PDF datasheet #6
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3–28
Table 3–9. Basic (PMA Direct) ×1 and Non-Basic (PMA Direct) Configurations at the Same Data Rate for Example 6
Stratix IV Device Handbook Volume 2
inst0
inst1
Instances
Basic (PMA Direct) ×1
(four channels)
Configuration
Combining Multiple Instances of TX Only and RX Only Configurations in Basic (PMA
Direct) ×1 Mode
The Quartus II software allows you to combine instances of TX only and RX only
configurations in Basic (PMA Direct) ×1 mode.
You can also combine TX only instances in non-Basic (PMA Direct) ×1 configuration
(non-bonded only) and the RX only instance in Basic (PMA Direct) configurations
(and vice versa) in the same physical channel. The combination requirements of the
instances in Basic (PMA Direct) ×1 configuration are similar to that of non-Basic
(PMA Direct) configuration. For more information, refer to the
Transmitter Channel and Receiver Channel Instances” on page
Combining Channels Configured in Basic (PMA Direct) ×1 with Non-Basic (PMA
Direct) Modes
You can combine a transceiver channel instance configured in Basic (PMA Direct) ×1
configuration with instances set up in non-Basic (PMA Direct) configurations (for
example, GIGE and SDI within the same transceiver block).
If the CMU PLL configuration for the Basic (PMA Direct) ×1 configuration and the
non-Basic (PMA Direct) configuration instances meet the requirements specified in
“Multiple Channels Sharing a CMU PLL” on page 3–5
Combine Channels” on page
these two instances. In addition, to share the same CMU PLL between the two
instances, the channel reconfiguration option must not be enabled in the instance
setup in non-Basic (PMA Direct) configuration.
Example 6
Consider the example design shown in
non-Basic (PMA Direct) configurations at the same data rate.
GIGE
CMU PLL Base
1.25 Gbps
1.25 Gbps
Data Rate
Chapter 3: Configuring Multiple Protocols and Data Rates in a Transceiver Block
3–3, the Quartus II software uses a single CMU PLL for
Combining Transceiver Channels with Basic (PMA Direct) Configuration
Table 3–9
Transmitter Channel
Effective Data Rate
1.25 G
1.25 G
for Basic (PMA Direct) ×1 and
and
© November 2009 Altera Corporation
“General Requirements to
“Combining
3–10.
Input Reference Clock
125 MHz (assume
Same as inst0
refclk0)
Frequency
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