RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 104

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
3.5
4.0
4.1
4.1.1
4.1.1.1
4.1.1.2
104
The TTL 8-bit parallel line side interface can also be used when Intel IXF6048 is configured as a
single STS-12 (non concatenated) processor. In this configuration, only one TTL parallel line side
interface (channel 0) is active.
TTL Quad Serial Line Side Interface
When configured as a Quad 51 Mbit/s transceiver (Quad STS-1), the Intel IXF6048 line side
interface I/O can be configured as four independent TTL serial-data interfaces. Each receive
interface provides the serial data and clock inputs, a tristatable output timing reference, a Lock
detect input, and an OOF output alarm.
SONET/SDH Framer Block Functional Description
Modes of Operation
Frame Format Configuration
Concatenated Frames
The Intel IXF6048 implements all the different concatenated framing formats dedicated to cell/
packet mapping over SONET/SDH, from 51.84 Mb/s up to a 2.5 Gb/s data rate.
In the cases of 51.84 Mb/s (STS-1/STM-0), 155 Mb/s (STS-3c/STM-1), and 622.08 Mb/s (STS-
12c/STM-4c), Intel IXF6048 integrates up to four fully independent framer processors (four
channels) in a single device. Each processor can have a framing format configuration different
from the other three.
When working at 2.5 Gb/s (STS-48c/STM-16c), Intel IXF6048 is configured as a single OC-48
processor. In this configuration, just one framer processor is enabled (channel 0), the other three
channels being completely disabled.
Non-Concatenated Frames
The four internal processors configured with the same framing format may be synchronized
together with the same clock and rate, so that the chip is able to generate and to demultiplex a
higher order rate, based on a non-concatenated frame transporting of up to four independent
payloads.
The Intel IXF6048 can thus fully process a non-concatenated STM-4 (622.08 Mb/s) with four
independent pointers.
When working at 2.5 Gb/s (OC-48), Intel IXF6048 can multiplex four STM-4c signals into a 2.5
Gb/s aggregate, and can demultiplex four STM-4c signals from a single 2.5 Gb/s aggregate. The
OC-48 signal integrates four STS-12c/STM-4c equivalent signals (i.e., four VC-4-4c) with
independent pointers. In other words, a single non-concatenated OC-3 (STS-3/STM-1) is three
concatenated OC-1s (STS-1/STM-0); a single non-concatenated OC-12 (STS-12/STM-4) is four
concatenated OC-3cs (STS-3c/STM-1); and a single non-concatenated OC-48 (STS-48/STM-12) is
four concatenated OC-12cs (STS-12c/STM-4c).
Datasheet